# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/nvidia,tegra114-spi.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra114 SPI controller

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

properties:
  compatible:
    oneOf:
      - const: nvidia,tegra114-spi
      - items:
          - enum:
              - nvidia,tegra210-spi
              - nvidia,tegra124-spi
          - const: nvidia,tegra114-spi

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    items:
      - description: SPI module clock

  clock-names:
    items:
      - const: spi

  resets:
    items:
      - description: SPI module reset

  reset-names:
    items:
      - const: spi

  dmas:
    items:
      - description: DMA channel for the reception FIFO
      - description: DMA channel for the transmission FIFO

  dma-names:
    items:
      - const: rx
      - const: tx

  spi-max-frequency:
    description: Maximum SPI clocking speed of the controller in Hz.
    $ref: /schemas/types.yaml#/definitions/uint32

allOf:
  - $ref: spi-controller.yaml

unevaluatedProperties: false

required:
  - compatible
  - reg
  - interrupts
  - clocks
  - clock-names
  - resets
  - reset-names
  - dmas
  - dma-names

examples:
  - |
    spi@7000d600 {
        compatible = "nvidia,tegra114-spi";
        reg = <0x7000d600 0x200>;
        interrupts = <0 82 0x04>;
        clocks = <&tegra_car 44>;
        clock-names = "spi";
        resets = <&tegra_car 44>;
        reset-names = "spi";
        dmas = <&apbdma 16>, <&apbdma 16>;
        dma-names = "rx", "tx";

        spi-max-frequency = <25000000>;

        #address-cells = <1>;
        #size-cells = <0>;

        flash@0 {
            compatible = "jedec,spi-nor";
            reg = <0>;
            spi-max-frequency = <20000000>;
            nvidia,rx-clk-tap-delay = <0>;
            nvidia,tx-clk-tap-delay = <16>;
        };
    };
