# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/qca,ar9331.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm Atheros AR9331 built-in switch

maintainers:
  - Oleksij Rempel <o.rempel@pengutronix.de>

description:
  Qualcomm Atheros AR9331 is a switch built-in to Atheros AR9331 WiSoC and
  addressable over internal MDIO bus. All PHYs are built-in as well.

properties:
  compatible:
    const: qca,ar9331-switch

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  interrupt-controller: true

  '#interrupt-cells':
    const: 1

  mdio:
    $ref: /schemas/net/mdio.yaml#
    unevaluatedProperties: false
    properties:
      interrupt-parent: true

    patternProperties:
      '(ethernet-)?phy@[0-4]+$':
        type: object
        unevaluatedProperties: false

        properties:
          reg: true
          interrupts:
            maxItems: 1

  resets:
    maxItems: 1

  reset-names:
    items:
      - const: switch

required:
  - compatible
  - reg
  - interrupts
  - interrupt-controller
  - '#interrupt-cells'
  - mdio
  - ports
  - resets
  - reset-names

allOf:
  - $ref: dsa.yaml#/$defs/ethernet-ports

unevaluatedProperties: false

examples:
  - |
    mdio {
        #address-cells = <1>;
        #size-cells = <0>;

        switch10: switch@10 {
            compatible = "qca,ar9331-switch";
            reg = <0x10>;

            interrupt-parent = <&miscintc>;
            interrupts = <12>;
            interrupt-controller;
            #interrupt-cells = <1>;

            resets = <&rst 8>;
            reset-names = "switch";

            ports {
                #address-cells = <1>;
                #size-cells = <0>;

                port@0 {
                    reg = <0x0>;
                    ethernet = <&eth1>;

                    phy-mode = "gmii";

                    fixed-link {
                        speed = <1000>;
                        full-duplex;
                    };
                };

                port@1 {
                    reg = <0x1>;
                    phy-handle = <&phy_port0>;
                    phy-mode = "internal";
                };

                port@2 {
                    reg = <0x2>;
                    phy-handle = <&phy_port1>;
                    phy-mode = "internal";
                };

                port@3 {
                    reg = <0x3>;
                    phy-handle = <&phy_port2>;
                    phy-mode = "internal";
                };

                port@4 {
                    reg = <0x4>;
                    phy-handle = <&phy_port3>;
                    phy-mode = "internal";
                };
            };

            mdio {
                #address-cells = <1>;
                #size-cells = <0>;

                interrupt-parent = <&switch10>;

                phy_port0: ethernet-phy@0 {
                    reg = <0x0>;
                    interrupts = <0>;
                };

                phy_port1: ethernet-phy@1 {
                    reg = <0x1>;
                    interrupts = <0>;
                };

                phy_port2: ethernet-phy@2 {
                    reg = <0x2>;
                    interrupts = <0>;
                };

                phy_port3: ethernet-phy@3 {
                    reg = <0x3>;
                    interrupts = <0>;
                };

                phy_port4: ethernet-phy@4 {
                    reg = <0x4>;
                    interrupts = <0>;
                };
            };
        };
    };
