# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/nuvoton,ma35d1-clk.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Nuvoton MA35D1 Clock Controller Module

maintainers:
  - Chi-Fang Li <cfli0@nuvoton.com>
  - Jacky Huang <ychuang3@nuvoton.com>

description: |
  The MA35D1 clock controller generates clocks for the whole chip,
  including system clocks and all peripheral clocks.

  See also:
    include/dt-bindings/clock/ma35d1-clk.h

properties:
  compatible:
    items:
      - const: nuvoton,ma35d1-clk

  reg:
    maxItems: 1

  "#clock-cells":
    const: 1

  clocks:
    maxItems: 1

  nuvoton,pll-mode:
    description:
      A list of PLL operation mode corresponding to CAPLL, DDRPLL, APLL,
      EPLL, and VPLL in sequential.
    maxItems: 5
    items:
      enum:
        - integer
        - fractional
        - spread-spectrum
    $ref: /schemas/types.yaml#/definitions/non-unique-string-array

required:
  - compatible
  - reg
  - "#clock-cells"
  - clocks

additionalProperties: false

examples:
  - |

    clock-controller@40460200 {
        compatible = "nuvoton,ma35d1-clk";
        reg = <0x40460200 0x100>;
        #clock-cells = <1>;
        clocks = <&clk_hxt>;
    };
...
